Hardware · ZXS 128k modification
Universal memory expansion for ZX Spectrum 16/48k (all issues) and Didaktik Gama (all revisions), designed by Pavel Cimbal (aka Zilog). This is third revision. It's fully compatible with original 128k, even 2nd video RAM is working as expected. There are also FASTIO (ports speed up) and UNRAIN (solves ULA raining bug) options - you can enable them with switch.
The expansion uses undocumented behavior of 48k ULA - when CPU accesses the RAM, /MREQ is active, but during video access ULA stops the CPU clock, and /MREQ is inactive. Logic in GAL prepares the combinations of A14 and A15 for ULA, and checks the paging register. Then it forces pages 2 or 5 to the right place, depending on state of paging register, A14 and/or A15.
Part list:
- 16 x 64kx1 DRAM (4164)
- 16 x DIL16 sockets
- 1 x 74LS174
- 1 x GAL20V8
- 2 x 3k3 resistor
- 2 x 1x3 pinhead
- 2 x 100n ceramic capacitor
- optional: 27C256, BC337, 100n ceramic capacitor
Phase 1:
- remove all VRAM chips (4116)
- remove all upper RAM chips (4532)
- cut -5V, +5V and 12V voltages to VRAM chips
- connect +5V to pin 8 of VRAM chips
- solder DIL sockets to all VRAM and upper RAM chip positions
- put 4164 DRAM chips to all sockets
- turn on Spectrum, it should work as usual (if not, you have something wrong somewhere)
Phase 2:
- cut A7 of upper RAM from multiplexer
- cut A15 between CPU and ULA (and multiplexer)
- connect A15 from CPU to edge connector pad 1B (component side), so A15 from CPU goes only to edge connector and KB2 connector, be sure you have it exactly as described
- build logic from schematic, don't forget to burn GAL
- connect it to Spectrum board according schematic
- tadaaa - you have 128k Speccy ;-)
WARNING! If you are modifying ZX Spectrum Issue2, Issue3 or Issue 4s board, change C64 from 100pF to 180pF, otherwise you will end up with memory errors as with the 100pF the /CAS signal is active too early and the addresses are not stable.
Optional:
- Replace 23128 ROM with 27C256 EPROM which contains ROM from ZXS 128k
- A14 goes to pin 12 of 74LS174 (ROM)
- VPP goes to +5V
- /OE goes to /RD
- /CE goes to /ROMCS
- block /ROMCS with common NPN transistor (C=+5V, B=/MREQ, E=/ROMCS)
Tips:
- D0-D5 get from pullups R9-R14
- /RESET, /RFSH, /IORQ, /WR, A1, A5, A14, A15 get from CPU pins
- VRAMA7 goes to A7 of VRAM chips
- FRAMA7 goes to A7 of upper RAM chips
- FSEL connect to upper multiplexer selector, e.g. pin 8 of IC23
- if you have ISSUE5 or 6, there is no IC23, so FSEL goes to pin 35 of IC27 (/MREQDL)
- VSEL goes to VRAM multiplexer selector, e.g. pin 1 of IC3 or IC4
- if you have ISSUE5 or 6, there is no IC3 or IC4, so VSEL goes to pin 35 of ULA (/RAS)
- newA15 goes to pin 37 on ULA (A15) and upper multiplexer only, pin 10 of IC24!
.files.
- schematic diagram: 128k-rebuild-ZXS-DG.png
- GAL content: 128k-rebuild-zxs-dg-pgal.zip
.galleries.